Transparent heterogeneous hardware Architecture deployment for eNergy Gain in Operation
Computer systems have faced significant power challenges over the past 20 years; these challenges have shifted from the devices and circuits level, to their current position as first-order constraints for system architects and software developers. TANGO’s goal is to characterise factors which affect power consumption in software development and operation for heterogeneous parallel hardware environments. Our main contribution is the combination of requirements engineering and design modelling for self-adaptive software systems, with power consumption awareness in relation to these environments. The energy efficiency and application quality factors are integrated in the application lifecycle (design, implementation, operation). To support this, the key novelty of the project is a reference architecture and its implementation. Moreover, a programming model with built-in support for various hardware architectures including heterogeneous clusters, heterogeneous chips and programmable logic devices will be provided. TANGO will create a new cross-layer programming approach for heterogeneous parallel hardware architectures featuring automatic code generation including software and hardware modelling. This will consider power, performance, data location and time criticality optimization, in addition to security and dependability on the target hardware architecture. These results will be demonstrated in two real-world applications: reconfigurable power optimized connected platform and HPC. In order to improve collaboration and sustainability of TANGO’s and fellow projects results, TANGO considers the foundation of a Research Alliance in which complementary research efforts into novel programming approaches will nucleate, leading to a strong research collaboration and effective integration of project results.